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NCP1501 Dual Mode PWM/Linear Buck Converter
The NCP1501 is a dual mode regulator that operates either as a PWM Buck Converter or as a Low Drop Out Linear Regulator. If a synchronization signal is present, the NCP1501 operates as a current mode PWM converter with synchronous rectification. The synchronization signal allows the user to control the location of the spurious frequency noise generated by a PWM converter. Linear mode is active when a synchronization signal is not present. The NCP1501 configuration allows an efficient high power operation and low noise during system sleep modes.
Features http://onsemi.com MARKING DIAGRAM
8 8 1 Micro8E (MSOP-8) DM SUFFIX CASE 846A 1 1501= Device Code A = Assembly Location Y = Year W = Work Week 1501 AYW
* * * * * * * * * * * * * * * * * *
Synchronous Rectification for Higher Efficiency in PWM Mode Linear Mode Operation for Low Noise Output at Low Loads Integrated MOSFETs and Feedback Circuits Cycle-by-Cycle Peak Current Limit of 800 mA (typ) Automatic Switching Between PWM and Linear Mode Operating Frequency Range of 500 to 1000 kHz Optimized for Ceramic Capacitors and Low Profile Inductors Thermal Limit Protection Built-in Slope Compensation for Current Mode PWM Converter Fixed Output Voltages of 1.05, 1.35, 1.57, 1.8 Shutdown Current Consumption of 0.2 mA Internal Soft Start Transistor Count: 3500 Cellular Phones PDAs Pagers Supplies for DSP Cores Portable Applications
PIN CONNECTIONS
SHD SYN VO LX 1 2 3 4 (Top View) 8 7 6 5 CB0 CB1 GND Vin
Typical Applications
ORDERING INFORMATION
Device NCP1501DMR2 Package Micro8 Shipping 4000/Tape & Reel
1 SHD 2 SYN 3 VO Vout 10 m L 10 mH 4 LX
CB0 CB1 GND Vin
8 7 6 5 10 m CIN Vbat
COUT
NCP1501
Figure 1. Typical Applications Circuit
(c) Semiconductor Components Industries, LLC, 2003
1
April, 2003 - Rev. 6
Publication Order Number: NCP1501/D
NCP1501
PIN FUNCTION DESCRIPTIONS
Pin # 1 2 3 4 5 6 7 8 Symbol SHD SYN VO LX Vin GND CB1 CB0 Pin Description Enable Pin for the NCP1501. This pin is active high. Internal pull down resistor forces the part off if the pin is not connected on the board. External Synchronization Signal Pin. The device will operate in PWM mode if a clock signal is present. The pin must be pulled low to enter LDO mode. Internal pull down resistor on pin. Feedback for the NCP1501. An internal MOSFET is connected across VO and LX for LDO mode. Connection for the pass devices to the inductor. Input voltage to the NCP1501. Ground Connection for the device. Voltage Selection Bit. Internal pull up resistor on pin. Voltage Selection Bit. Internal pull down resistor on pin.
MAXIMUM RATINGS
Rating Maximum Voltage All Pins Maximum operating Voltage All Pins Thermal Resistance, Junction-to-Air Operating Ambient Temperature Range ESD Withstand Voltage Moisture Sensitivity Storage Temperature Range Junction Operating Temperature Range Human Body Model (Note 1) Machine Model (Note 2) Symbol Vmax Vmax RqJA TA VESD MSL Tstg TJ Value 5.5 5.2 240 -30 to +85 > 2500 > 100 Level 1 -55 to +150 -30 to +125 C C Unit V V C/W C V
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum-rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Tested to EIA/JESD22-A114-A 2. Tested to EIA/JESD22-A115-A
ELECTRICAL CHARACTERISTICS (Vin = 3.6 V, VO = 1.57 V, TA = 25C, Fsyn = 600 kHz 50% Duty Cycle square wave for PWM mode; TA = -30 to 85C for Min/Max values, unless otherwise noted.)
Characteristic VCC Pin Quiescent Current of Switching Mode, Iout = 0 mA Quiescent Current of LDO Mode, Iout = 0 mA Quiescent Current, SHD Low Input Voltage Range Sync Pin Input Voltage Frequency Operational Range Minimum Synchronization Pulse Width Maximum Synchronization Pulse Width SYNC "H" Voltage Threshold SYNC "L" Voltage Threshold SYNC "H" Input Current, Vsync = 3.6 V SYNC "L" Input Current, Vsync = 0 V Vsync Fsync Dcsync(min) Dcsync(max) Vsync(H) Vsync(L) Isync(H) Isync(L) -0.3 500 400 -0.5 30 70 920 830 1.8 0.005 VCC+0.3 1000 1200 V kHz % % mV mV mA mA Iq PWM Iq LDO Iq Off Vin 2.7 124 32 0.2 500 65 1.0 5.2 mA mA mA V Symbol Min Typ Max Unit
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NCP1501
ELECTRICAL CHARACTERISTICS (continued) (Vin = 3.6 V, VO = 1.57 V, TA = 25C, Fsyn = 600 kHz 50% Duty Cycle square wave for PWM mode; TA = -30 to 85C for Min/Max values, unless otherwise noted.)
Characteristic Output Level Selection Pins Input Voltage CB0,1 "H" Voltage Threshold CB0,1 "L" Voltage Threshold CB0,1 "H" Input Current, CBx = 3.6 V CB0,1 "L" Input Current, CBx = 0 V Shutdown Pin Input Voltage SHD "H" Voltage Threshold SHD "L" Voltage Threshold SHD "H" Input Current, SHD = 3.6 V SHD "L" Input Current, SHD = 0 V Feedback Pin Input Voltage Input Current, Vfb = 1.8 V PWM Mode Characteristics Switching P-FET Current Limit Duty Cycle Minimum On Time RDS(on) Switching N-FET P-FET Switching P-FET and N-FET Leakage Current Output Over Voltage Threshold Output Voltage Accuracy, Vout(set) = 1.05 V CB0 = L, CB1 = L Output Voltage Accuracy, Vout(set) = 1.35 V CB0 = L, CB1 = H Output Voltage Accuracy, Vout(set) = 1.57 V CB0 = H, CB1 = H Output Voltage Accuracy, Vout(set) = 1.80 V CB0 = H CB1 = L Load Transient Response, 10 to 100 mA Load Step Line Transient Response, Iout = 100 mA, 3.0 to 3.6 Vin Line Step LDO Mode Characteristics RDS(on) LDO FET (Inductor Switch), LX to Vout Dropout Voltage (Limited by Vin(min) = 2.5 V and Vout(max) = 1.8 V) Output Voltage Accuracy, Vout(set) = 1.05 V CB0 = L, CB1 = L Output Voltage Accuracy, Vout(set) = 1.35 V CB0 = L, CB1 = H Output Voltage Accuracy, Vout(set) = 1.57 V CB0 = H, CB1 = H Output Voltage Accuracy, Vout(set) = 1.80 V CB0 = H CB1 = L Thermal Shutdown Thermal Shutdown Hysteresis TSD TSDhys 160 25 C C RDS(on) Vin - Vout Vout 1.018 1.309 1.523 1.740 7.0 0.7 1.050 1.350 1.570 1.800 1.082 1.391 1.617 1.860 Ohms V V Ilim DC Ton(min) RDS(on) Ileak VO Vout 1.018 1.309 1.523 1.740 0.7 0.6 0.01 3.0 1.050 1.350 1.570 1.800 40 5 10 1.082 1.391 1.617 1.860 mA % V 800 100 100 mA % nsec Ohms Vfb Ifb -0.3 8.5 VCC+0.3 V mA VSHD VSHD(H) VSHD(L) ISHD(H) ISHD(L) -0.3 400 -0.5 920 850 1.8 0 VCC+0.3 1200 V mV mV mA mA VCB VCB(H) VCB(L) ICB(H) ICB(L) -0.3 400 -0.5 910 850 1.8 0 VCC+0.3 1200 V mV mV mA mA Symbol Min Typ Max Unit
Vout Vout
mV mVpp
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NCP1501
SHD Reference Out + ILimit PWM SYN Sync Detection and Timing Block Mode Select + Slope Compensation SoftStart + Out RQ + SQ LX C1 VCC Input Voltage
PWM Comparator Thermal Shutdown Linear Control Block
L
Out
+ Vref + 5% VO Output Voltage C2 Vref
OVP Comparator Out
+ -
Error Amplifier CB0
CB1
Output Voltage Program MUX
Ground
Component C1, C2 L
Value 10 mF, 6.3 V 10 mH
Manufacturer TDK, C2012X5R0J106M (0805 size) TDK, LLF4017-100 (Iout = 300 mA) Coilcraft, LPO4812-103MX (Iout = 300 mA) Coilcraft, 0805PS-103M (Iout = 150 mA) TDK, NLC252018T-100 (Iout = 100 mA)
Figure 2. Typical Circuit with the Internal Schematic
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NCP1501
DETAILED OPERATING DESCRIPTION The Buck regulator is a synchronous rectifier PWM regulator with integrated MOSFETs. This regulator has an LDO function for low power modes to conserve power and lower ripple voltage associated with PFM mode. The NCP1501 does not contain an internal oscillator for the switching mode. The Dual PWM/LDO mode is an exclusive Patent Pending circuit. The PWM clock is generated via an external clock signal on the Synchronization pin. The operating frequency range for the PWM is 500 to 1000 kHz. The output current of the PWM is typically 100 mA with a guarantee of over 300 mA for the 2.7 to 5.2 input voltage range. If a synchronization pulse is not present, the NCP1501 changes into the LDO mode. The LDO function assures the user of an extremely low output ripple voltage and greatly reduced quiescent current when the users system is in a sleep mode. Internally to the NCP1501, the Synchronization pin has a pull down resistor to force the part into LDO mode when a clock signal is not present. To place the NCP1501 in LDO mode, the user must set the Synchronization pin low. The LDO mode guarantees an output in excess of 50 mA. Pins CB0 and CB1 control the output voltage selection. The four voltages are 1.05, 1.35, 1.57, 1.8 volts. CB0 contains a pull down resistor and CB1 contains a pull up resistor internal to the NCP1501. The resistors force the output of the converter to 1.35 volts if the pins are floating connections to the external circuit. The Shutdown Pin enables the operation of the device. The Shutdown Pin has an internal pull down resistor to force the NCP1501 into the off mode if this pin is floating due to the external circuit. During Startup, the NCP1501 has a soft start function to limit fast dV/dt and eliminate overshoot on the output.
Vbat Cin 10 m
LX Q1 Ilim Q3 FB DC/DC CONTROL EA
L1 10 mH Vout
CB0 CB1
Sync SHD
LDO CONTROL
Q2 Cout 10 m
Figure 3. Block Diagram and Circuit Schematic of the NCP1501
The external components required are an input and an output 10 mF ceramic capacitor and a 10 mH inductor.
PWM Mode
During normal operation, a synchronization pulse acts as the clock for the DC/DC controller. The rising edge of the clock pulls the gate of Q1 low allowing the inductor to charge. When the current through Q1 reaches either the current limit or feedback voltage reaches its limit, Q1 will turn off and Q2 will turn on. Q2 replaces the free wheeling diode typically associated with Buck Converters. Q2 will turn off when either a rising edge sync pulse is present or all the stored energy is depleted from the inductor. Q3 remains off during this mode.
The output voltage accuracy in the PWM mode is well within 3% of the nominal set value. An over voltage protection circuit is present in the PWM mode to limit the positive voltage spike due to fast load transient conditions. The PWM also has the ability to go to 100% duty cycle for transient conditions and low input to output voltage differentials. In PWM mode, each switching cycle has a guaranteed on-time of 100 ns. The NCP1501 has two protection circuits that can eliminate the cycle. When tripped, the over voltage protection or the thermal shutdown overrides the gate drive of the high side MOSFET.
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NCP1501
L1 10 mH Q1 Load
Sync Vbat C1 10 m
Set OCP R1 En Ramp R2 I PFET + - COMP S R En Latch - + Q
R3 C2 10 m
Q2 R4 Vref
Vref + 5%
+ - OVP COMP
ERROR AMP
Figure 4. PWM Circuit Schematic LDO Mode
When the synchronization pulse is not present, the NCP1501 operates as an LDO. The DC/DC Control Circuitry will relinquish control of Q1 and turn off Q2. The
LDO Control Circuitry will turn on Q3 as a bypass circuit to the inductor. Q1 is the controlling pass device of the LDO that regulates the input to output voltage dropout. The LDO can source an output current in excess of 50 mA.
L1 10 mH Q1 Load
Switch/Invert Sync Vbat C1 10 m En Ramp Set In Out En Q3 R3 C2 10 m R4
ERROR AMP
- + Vref
Figure 5. LDO Circuit Schematic
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NCP1501
Voltage Output Selection
Internal CLK Signal Vin
The output voltage selection is accomplished via two external pins: CB0 and CB1. If CB0 and CB1 pins are left floating by the external circuit, the output voltage will default to 1.35 V. The corresponding voltages are as follows.
NCP1501 CB0 0 0 1 1 CB1 0 1 1 0 Vout (V) 1.05 1.35 1.57 1.80
0 External SYNC Signal 3.0
0
0
TIME (m)
10
Figure 6. Transition Waveforms from LDO to PWM Mode
Vin SHD 1.57 V 1.35 V VO CB0 1.05 V 1.8 V
CB1
Figure 7. Power Up and Power Down Sequence Thermal Shutdown
Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated, typically at 160C, the PWM latch is reset and the linear regulator control circuitry is disabled. The thermal shutdown circuit is designed with 25C of hysteresis. This means that the
PWM latch and the regulator control circuitry cannot be re-enabled until the die temperature drops by this amount. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended as a substitute for proper heatsinking. The NCP1501 is contained in the Micro-8 package.
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NCP1501
3.6040 3.6000 3.5960 400 m 200 m 0.00 400 m 300 m 200 m 400 m 100 m -200 m 1.573 1.570 1.567 3.70 1.35 -1.00 198.0 201.0 204.0 TIME (m) 207.0 210.0 213.0 VLX VO INFET IL IPFET Vin
Figure 8. Waveforms During Normal Operation
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NCP1501
APPLICATIONS INFORMATION NCP1501 is a dual mode PWM or LDO step down converter. This dual mode takes advantage of the best of each mode. There are three required external components: an input and output capacitor and an inductor. The PWM mode allows high efficiency for larger loads. A typical efficiency for an input of 3.6 volts and an output of 1.8 volts and 100 mA is over 90%. Low RDSon and synchronous rectification contained within the device contributes to the very high efficiency. As with other synchronous rectification devices, the NCP1501 does not require an external diode to supplement the NFET during switching on or off. A synchronization pin allows the user to define the frequency noise spikes of the PWM. The duty cycle of the synchronization signal must be within the range
1 SHD 2 SYN 3 VO Vout 10 m L Cout 10 mH 4 LX
of 30% to 70%. The rising edge of the signal from the synchronization pin acts as the oscillator signal to set the latch and reset the ramp compensation signal. An Over Voltage Protection circuit ensures the output will respond properly to fast transients from large to small loads. The NCP1501 allows the PWM mode to enter a 100% duty cycle for fast load transient conditions and low input to output voltage differentials. The LDO mode is effective during low load conditions by lowering the quiescent current and reducing the output ripple voltage associated with PWM converters entering PFM mode. NCP1501 enters the LDO mode when a synchronization signal is not present. It is recommended to pull the synchronization signal low for LDO mode.
CB0 CB1 GND Vin 8 7 6 5 10 m Cin Vbat Cin, Cout: 10 mF Ceramic, C2012X5R0J106M (TDK) L: 10 mH, LLF4017-100 (TDK)
NCP1501
Figure 9. Typical Operating Schematic
2.5
2 1.8
2
1.6 1.4
ISHD (mA)
ISYN (mA)
1.5
1.2 1 0.8 0.6 VCC = 3.6 V TA = 25C
1 VCC = 3.6 V TA = 25C
0.5 0 0 1 2 VSHD (V) 3
0.4 0.2 0
4
5
0
1
2 VSYN (V)
3
4
Figure 10. Input Current versus Voltage for the Shutdown Pin
Figure 11. Input Current versus Voltage for the Synchronization Pin
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NCP1501
2.5 8 7 2 6 5 ICB (mA) IFB (mA) 1.5 4 3 2 0.5 0 0 1 2 VCB (V) 3 4 VCC = 3.6 V TA = 25C 1 0 -1 0 0.5 1 VFB (V) 1.5 2 VCC = 3.6 V TA = 25C PWM Mode
1
Figure 12. Input Current versus Voltage for the CB Pins
Figure 13. Input Current versus Voltage for the Feedback Pin
0.93 0.92 0.91 VCB(threshold) (V) 0.90 Vout (V) 0.89 0.88 0.87 0.86 TA = 25C LDO Mode Vth High
1.6 1.55 1.5 1.45 1.4 1.35 VCC = 3.6 V TA = 25C LDO Mode
0.85 0.84 2
Vth Low 3 4 VCC (V) 5 6
1.3 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VCB (V)
Figure 14. VCC Input Voltage versus CB Threshold
Figure 15. Transition Level of CB Pins
0.93 0.92 1.8 0.91 VCB(threshold) (V) 0.90 0.89 0.88 0.87 0.86 0.85 0.84 2 3 4 VCC (V) 5 6 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VCB (V) VSHD Low 0 TA = 25C LDO Mode TA = 25C LDO Mode Vout (V) VSHD Decreasing VSHD Increasing VSHD High
Figure 16. Input Voltage versus Shutdown Voltage
Figure 17. Output Voltage versus Shutdown Pin Voltage
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NCP1501
2.0 1.8 1.6 1.4 Vout (V) 1.2 1.0 0.8 0.6 0.4 0.2 0 0 1 2 3 Vin (V) 4 5 6 1.80 Vout 1.57 Vout 1.35 Vout Vin (V) 1.05 Vout 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 1 2 3 Vout (V) 4 5 6 1.80 Vout 1.57 Vout 1.35 Vout 1.05 Vout
Figure 18. Output Voltage versus PWM Input Voltage
Figure 19. Input Voltage versus Output Voltage
95
92 91 1.80 Vout 1.57 Vout 1.35 Vout
90 EFFICIENCY (%) 1.8 Vout 85 1.57 1.35 80 VCC = 3.6 V 75 70 0 50 100 150 200 250 300 Iout, OUTPUT CURRENT (mA) 1.05 EFFICIENCY (%)
90 89 88 87 86 85 84 83 500 600 700 800 Vin = 3.6 V Iout = 100 mA
Freq = 600 kHz TA = 25C
See Figure 9 for Circuit
1.05 Vout
900
1000
FREQUENCY (kHz)
Figure 20. Efficiency versus Output Current
Figure 21. Efficiency versus Frequency
1200 1000 800 PWM 600 400 200 0 0 200 400 600 800 1000 Iout, OUTPUT CURRENT (mA) Vin = 3.6 V Vout = 1.8 V PWM Freq = 600 kHz LDO EFFICIENCY (%)
94 92 90 1.8 Vout 88 86 84 82 2.7 3.2 3.7 4.2 4.7 5.2 Vin, INPUT VOLTAGE (V) Iout = 100 mA Freq = 600 kHz TA = 25C 1.57 1.35 1.05
Iin, INPUT CURRENT (mA)
Figure 22. Input Current versus Output Current Comparison for PWM and LDO Mode
Figure 23. Efficiency versus Input Voltage
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NCP1501
SYNC Vout Vin = 3.6 V
SYNC Vout Vin = 3.6 V
Vout = 1.8 V Iout = 10 mA
LX
Vout = 1.8 V Iout = 10 mA
LX
Figure 24. Transition from LDO to PWM Mode
Figure 25. Transition from PWM to LDO Mode
Vout
Vout
Vin Vin
Vout = 1.8 V Iout = 10 mA Freq = 600 kHz
Vout = 1.8 V Iout = 10 mA Freq = 600 kHz
Figure 26. Line Transient from 3.0 to 3.6 V
Figure 27. Line Transient from 3.6 to 3.0 V
Iout Vout
Vin = 3.6 V Vout = 1.8 V Iout = 10 mA Freq = 600 kHz
Vout
Iout
Vin = 3.6 V Vout = 1.8 V Iout = 10 mA Freq = 600 kHz
Figure 28. Load Transient from 10 to 100 mA
Figure 29. Load Transient from 100 to 10 mA
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NCP1501
1.0 m 900 m 800 m 700 m 600 m 500 m 400 m 300 m 200 m 100 m 10 n Start 0 Hz 1.0 MHz Stop 10 MHz 805.4 mV Vin = 3.6 V Vout = 1.57 V Load = 15 W F = 600 kHz 200 m 180 m 160 m 140 m 120 m 100 m 80 m 60 m 40 m 20 m 2.0 n Start 0 Hz 1.0 MHz Stop 10 MHz 129.3 mV Vin = 3.6 V Vout = 1.57 V Load = 15 W F = 1.0 MHz
Figure 30. Vrms versus Frequency
Figure 31. Vrms versus Frequency
1.0 m 900 m 800 m 700 m 600 m 500 m 400 m 300 m 200 m 100 m 10 n Start 0 Hz 1.0 MHz Stop 10 MHz 854.3 nV Hz Vin = 3.6 V Vout = 1.57 V Load = 15 W F = 600 kHz
200 m 180 m 160 m 140 m 120 m 100 m 80 m 60 m 40 m 20 m 2.0 n Start 0 Hz 1.0 MHz Stop 10 MHz 130.3 nV Hz Vin = 3.6 V Vout = 1.57 V Load = 15 W F = 1.0 MHz
Figure 32. Noise versus Frequency
Figure 33. VRMS versus Frequency
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NCP1501
PACKAGE DIMENSIONS
Micro8 (MSOP-8) DM SUFFIX CASE 846A-02 ISSUE F
-A-
K
-B-
PIN 1 ID
G D 8 PL 0.08 (0.003)
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. DIM A B C D G H J K L MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 --- 1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 --- 0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028
TB
S
A
S
-T-
SEATING PLANE
0.038 (0.0015) H
C J L
Micro8 is a trademark of International Rectifier.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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NCP1501/D

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